Continuous improvements in the fabrication and design of semiconductor transistors used in integrated circuit devices have permitted ever greater area densities of transistors. Development of materials and processing for interconnects and contacts plays a large role in transistor development.
Materials and processes for forming conductive contacts and interconnects must accommodate, for example, dimensional requirements, processing temperatures, reliability needs and materials compatibility. Traditional aluminum-based interconnects have gradually given way to copper interconnects for fine dimensions; cobalt silicide and other metallic materials are gradually supplanting titanium silicide source and drain contacts and titanium silicide caps on doped polycrystalline silicon gate contacts.
Another avenue for improvement in device performance involves the use of newer types of substrates as replacements for traditional silicon wafers. For example, wafers that have a silicon-germanium (SiGe) layer can provide improved channel layer performance in a strained-silicon layer grown on the SiGe layer.
Mobility enhancements obtained from strained silicon, in combination with source-drain and gate silicidation techniques, provide the opportunity to increase speed, reduce power consumption, and provide the basis of other advances in microelectronics, such as analog and digital device integration.
The use of substrates that include a SiGe layer, however, can increase fabrication complexity relative to that for conventional silicon wafer-based devices. For example, formation of source and drain contacts through reaction of a metal layer, such as titanium or cobalt, with SiGe in the substrate has preferred process conditions that are different from silicide formation with relatively pure silicon.